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FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet www.onsemi.com semiconductor components industries , llc, 2017 publication order number: march, 2017, rev. 1.0 FDP2D3N10C / fdpf2d3n10c/d 1 FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet 100 v, 222 a, 2.3 m features ? max r ds(on) = 2.3 m at v gs = 10 v, i d = 100 a ? extremely low reverse recovery charge, qrr ? 100% uil tested ? rohs compliant general description this n-channel mv mosfet is produced using on semiconductor?s advanced powertrench ? process that incorporates shielded gate technology. this process has been optimized to minimize on-state resistance and yet maintain superior switching performance with best in class soft body diode. applications ? synchronous rectification for atx / server / telecom psu ? motor drives and uninterruptible power supplies ? micro solar inverter g s d to-220f d s g d s g to-220 mosfet maximum ratings t c = 25 c unless otherwise noted. * drain current limited by maximum junction temperature. package limitation current is 120a. thermal characteristics package marking and ordering information symbol parameter ratings units FDP2D3N10C fdpf2d3n10c v ds drain to source voltage 100 100 v v gs gate to source voltage 20 20 v i d drain current -continuous t c = 25c (note 3) 222* 222* a -continuous t c = 100c (note 3) 157* 157* -pulsed (note 1) 888 888 e as single pulse avalanche energy (note 2) 1176 mj p d power dissipation t c = 25c 214 45 w power dissipation t a = 25c 2.4 2.4 t j , t stg operating and storage junction temperature range -55 to +175 c symbol parameter FDP2D3N10C fdpf2d3n10c units r jc t h e r m a l r e s i s t a n c e , j u n c t i o n t o c a s e , m a x . 0 . 7 3 . 3 c/w r ja t h e r m a l r e s i s t a n c e , j u n c t i o n t o a m b i e n t , m a x . 6 2 . 5 6 2 . 5 device marking device package packing method quantity FDP2D3N10C FDP2D3N10C to-220 tube 50 units fdpf2d3n10c fdpf2d3n10c to-220f tube 50 units
FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet www.onsemi.com 2 electrical characteristics t j = 25 c unless otherwise noted. off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristic symbol parameter test conditions min. typ. max. units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 100 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 70 mv/c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v 1 a v ds = 80 v, t j = 150c 500 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 700 a 2.0 3.0 4.0 v r ds(on) static drain to source on resistance v gs = 10 v, i d = 100 a 2.1 2.3 m g fs forward transconductance v ds = 5 v, i d = 100 a 222 s c iss input capacitance v ds = 50 v, v gs = 0 v, f = 1 mhz 7980 11180 pf c oss output capacitance 4490 6290 pf c rss reverse transfer capacitance 40 75 pf r g gate resistance 0.1 0.8 1.8 t d(on) turn-on delay time v dd = 50 v, i d = 100 a, v gs = 10 v, r gen = 6 42 67 ns t r rise time 35 56 ns t d(off) turn-off delay time 74 118 ns t f fall time 32 57 ns q g total gate charge v gs = 0 v to 10 v v dd = 50 v, i d = 100 a 108 152 nc q gs gate to source gate charge 36 nc q gd gate to drain ?miller? charge 22 nc q oss output charge v dd = 50 v, v gs = 0 v 297 nc i s maximum continuous drain to source diode forward current - - 222 a i sm maximum pulsed drain to source diode forward current - - 888 a v sd source to drain diode forward voltage v gs = 0 v, i sd = 100 a 0.9 1.3 v t rr reverse recovery time v gs = 0 v, v dd = 50 v, i f = 100 a, di f /dt = 100 a/ s 107 172 ns q rr reverse recovery charge 191 306 nc t rr reverse recovery time v gs = 0 v, v dd = 50 v, i f = 100 a, di f /dt = 300 a/ s 97 155 ns q rr reverse recovery charge 492 788 nc notes : 1. pulsed id please refer to figure.11 and figure.1 2 ?forward bias safe operating area? for more details. 2. e as of 1176 mj is based on starting t j = 25 c, l = 3 mh, i as = 28 a, v dd = 90 v, v gs = 10 v. 100% test at l = 0.1 mh, i as = 89 a. 3. computed continuous current limited to max junction temperat ure only, actual continuous current will be limited by thermal & electro-mechanical application board design.
FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet www.onsemi.com 3 typical characteristics t j = 25 c unless otherwise noted. figure 1. 0123 0 60 120 180 240 300 360 v gs = 5.5 v v gs = 5 v v gs = 10 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 4.5 v v gs = 6 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 60 120 180 240 300 360 0 1 2 3 4 5 6 7 pulse duration = 80 p s duty cycle = 0.5% max v gs = 5 v normalized drain to source on-resistance i d , drain current (a) v gs = 5.5 v v gs = 6 v v gs = 4.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e v s . d r a i n c u r r e n t a n d g a t e v o l t a g e f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 175 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 i d = 100 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs. junction temperature figure 4. 45678910 0 4 8 12 16 t j = 150 o c i d = 100 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max on-resistance vs. gate to source voltage figure 5. transfer characteristics 234567 0 60 120 180 240 300 360 t j = 175 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 400 t j = -55 o c t j = 25 o c t j = 175 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs. source current
FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet www.onsemi.com 4 figure 7. 0 102030405060708090100110120 0 2 4 6 8 10 i d = 100 a v dd = 75 v v dd = 30 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 50 v gate charge characteristics figure 8. 0.1 1 10 100 1 10 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s . d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1000 1 10 100 500 t j = 125 o c t j = 25 o c t j = 150 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 175 0 40 80 120 160 200 240 r t jc = 0.7 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs. case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e 0.1 1 10 100 400 0.1 1 10 100 1000 2000 100 p s curve bent to measured data 10 p s 10 ms 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t jc = 0.7 o c/w t c = 25 o c operating area for FDP2D3N10C figure 12. forward bias safe 0.1 1 10 100 400 0.1 1 10 100 1000 2000 100 p s curve bent to measured data 10 p s 10 ms 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t jc = 3.3 o c/w t c = 25 o c operating area for fdpf2d3n10c typical characteristics t j = 25 c unless otherwise noted.
FDP2D3N10C / fdpf2d3n10c n-channel shielded gate powertrench ? mosfet www.onsemi.com 5 figure 13. single pulse maximum power dissipation for fdp2d3n10 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 100 1000 10000 100000 single pulse r t jc = 0.7 o c/w t c = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) c figure 14. 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 100 1000 10000 100000 single pulse r t jc = 3.3 o c/w t c = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) single pulse maximum power dissipation for fdpf2d3n10c figure 15. junction-to-case transient thermal response curve for FDP2D3N10C 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 0.001 0.01 0.1 1 2 single pulse duty cycle-descending order r(t), normalized effective transient thermal resistance t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: z t jc (t) = r(t) x r t jc r t jc = 0.7 o c/w duty cycle, d = t 1 / t 2 peak t j = p dm x z t jc (t) + t c figure 16. junction-to-case transient thermal response curve for fdpf2d3n10c 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 0.0001 0.001 0.01 0.1 1 2 single pulse duty cycle-descending order r(t), normalized effective transient thermal resistance t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: z t jc (t) = r(t) x r t jc r t jc = 3.3 o c/w duty cycle, d = t 1 / t 2 peak t j = p dm x z t jc (t) + t c typical characteristics t j = 25 c unless otherwise noted.
5 3 5 3 4.672 4.472 10.360 10.109 3.89 3.60 2.860 2.660 8.787 8.587 15.215 14.757 2.640 2.440 1.650 1.250 (see note e) 0.889 0.787 5.180 4.980 13.894 12.941 1.91 15.97 15.89 0.36 m b a 0.36 m c b a b 1.41 1.17 7 3 6.477 6.121 2.755 2.555 0.457 0.357 5 3 5 3 c 12.878 12.190 8.89 6.86 3.962 3.505 notes: a. package reference: jedec to220 variation ab b. all dimensions are in millimeters. c. dimension and tolerance as per asme y14.5-2009. d. dimensions are exclusive of burrs, mold flash and tie bar protrusions. e. max width for f102 device = 1.35mm. f. drawing file name: to220t03rev4. g. fairchild semiconductor. 3 1 3 1
b 4.90 4.50 16.00 15.60 10.05 9.45 3.40 3.20 3.28 3.08 b 10.36 9.96 1.47 1.24 0.90 0.70 0.45 0.25 30 2.54 2.54 7.00 2.14 (3.23) b 1 3 see note "f" 0.50 m a a b 2.66 2.42 b 16.07 15.67 2.96 2.56 b 0.60 0.45 0.70 6.88 6.48 1 x 45 see note "f" notes: a. except where noted conforms to eiaj sc91a. b does not comply eiaj std. value. c. all dimensions are in millimeters. d. dimensions are exclusive of burrs, mold flash and tie bar protrusions. e. dimension and tolerance as per asme y14.5-1994. f. option 1 - with support pin hole. option 2 - no support pin hole. g. drawing file name: to220m03rev5
www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 www.onsemi.com literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative ? semiconductor components industries, llc
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